AI hardware doesn’t use regular DDR memory – it’s too slow. Instead, the preferred format is High Bandwidth Memory or HBM. SK hynix just announced that it has started delivering samples of the latest HBM4E to its customers.
HBM4E delivers 16Gbps of bandwidth per pin. For comparison, the previous HBM4 standard did 10Gbps per pin. Samsung started sampling its own HBM4E design a month ago and it claimed 14Gbps per pin.
The design currently being shipped to SK hynix’s partners has 12 dies stacked on top of each other. This 12-layer design works out to 48GB of capacity – that is per stack, of course, and most AI accelerator designs will use multiple stacks.
SK hynix claims that its HBM4E memory is 20% more power efficient than the previous HBM4. Additionally, it constructs the stacks using MR-MUF – Mass Reflow Molded Underfill – which uses protective liquid between the silicon dies to protect the circuits on them. The final result has 17% lower heat resistance than the old design, which will help with cooling.
SK hynix’s HBM4E memory does 16Gbps per pin, is 20% more power efficient
“The company was able to deliver samples of the 12-stack HBM4E on schedule thanks to its advanced HBM development and production expertise for HBM. We will work closely with partners for mass production in a timely manner,” writes SK hynix in its press release.
